In multiprocessor computer systems and the like, in which systems utilizing different processors are simultaneously in operation, access to memory or other shared resources becomes complex. Since it is likely that each of the processors or processor systems may require access to the same memory simultaneously, a conflict between processors will generally be unavoidable.
Essentially, the operation of two or more processors or processor systems periodically results in overlap of the memory commands with respect to a common memory, or other shared resource, in the multi-processor computer system.
Conventional approaches to solving the problem of conflicting memory access requests to a shared memory include, in one case, complete redundancy of the memories used for each of the processors, and isolation of the processor systems. However, this approach to solving the problem of conflicting memory access requests often defeats the intended advantage of the multiple processor system.
Various approaches have been used to avoid the above described conflict problems. In one approach, the avoidance of conflicts is accomplished by sequentially operating the processors or by time sharing the processors.
In this way, the processors simply “take turns” accessing the shared resource in order to avoid conflict. Such systems commonly used include passing the ring” or “token systems” in which the potentially conflicting processors are simply polled by the system in accordance with a pre-determined sequences similar to passing a ring about a group of users.
Unfortunately, use of sequential processor access methodologies imposes significant limitation upon the operation of the overall computer system. This limitation arises from the fact that a substantial time is used by the system in polling the competing processors. In addition, in the case where a single processor is operating and requires access to the shared memory, for example, a delay between the processor accesses to the shared resource is created following each memory cycle as the system steps through the sequence.
Another conventional approach to conflict avoidance relies upon establishing priorities amongst the processors in the computer system.
One such arrangement provides for every processor having assigned to it a priority with the hierarchy of system importance. The memory controller simply provides access to the highest priority processor every time a conflict occurs. For example, in a two processor system, a first and a second processor access a shared memory which is typically a dynamic RAM (DRAM) type memory device which requires periodic refreshing of the memory maintain stored data. Generally, the DRAM type memory is refreshed by a separate independent refresh system. In such a multi-processor system, both the processors and the refresh system compete for access to the common memory. A system memory controller will process memory access request conflicts, or commands, as determined by the various priorities assigned to the processors and the refresh system. While such systems resolve conflicts and are somewhat more efficient than pure sequential conflict avoidance systems, it still suffers from lack of flexibility.
Yet another approach to conflict resolution involves decision-making capabilities incorporated into the memory controller. Unfortunately, because the decision making portions of the memory controller are operated under the control and timing of a clock system, a problem arises in the substantial time is utilized in performing the actual decision making before the memory controller can grant access to the common memory.
PCT/WO US9926994 describes a universal resource access controller coupled to a requesting system and a resource, such that when the requesting system desires access to the resource, the requesting system generates a resource access request which is passed to the universal resource controller. The universal resource controller, in turn, uses a specific characteristic operating parameter of the requested resource as well as a current state of the requested resource to generate a corresponding sequenced universal access request command suitable for accessing the resource as required by the requesting system.
Though, in any one of the above-mentioned cases, when a specific shared resource is accessed during execution of a particular command, the resource is non-available for another command. Therefore, if a number of shared resources participate in executing a particular command, they are all locked up while the command is completely executed.
In other words, parallel processing known as a computer technology in which several or even hundreds processors are linked and able to work on different parts of a problem simultaneously, does not resolve the problem that when such “different parts of the problem” require one and the same resource to be utilized for their needs, one part of the problem should wait until the other part completes using the resource.
Some new developments in the field have been described in the prior art, for example in a Japanese publication No. JP 10301608A “Controller for work Machine” to Yaskawa Electric Corp. The problem set in the JP'608A publication seems similar to that which exists in many modem complex systems: providing a simultaneous operation control and a partially independent operation control by distributing operation instructions to a prescribed actuator based on a so-called “physical axis constitution information” for noting the connection relation of a controlled system and a physical actuator.
To solve the problem, JP'608A proposes that a work program is stored in a work program storage by using a so-called programming pendant, and the physical axis information is stored in a physical axis constitution information storage. The work program is interpreted and executed by respective sequence execution blocks, operation commands are prepared and outputted to an output area. The operation commands are simultaneously sent to a drive control unit assigned to a particular number according to the physical axis information to operate a motor. By turning the sequence execution blocks to multiple tasks, the execution of mutually asynchronous work programs is made possible. The Japanese publication, however, does not disclose how the sequence execution blocks can be turned to the multiple tasks and how the asynchronous operation becomes possible.